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  • What does PHY refer to? - Electrical Engineering Stack Exchange
    a PHY is a type of Ethernet physical layer (eg 100BASE-TX, 10BASE-T) a PHY is an Ethernet transceiver IC (eg an IC that converts 100BASE-TX to MII RMII) a PHY is a physical layer device (more than just the transceiver IC) Is PHY ambiguous and can refer to all of these or did I understand something wrong?
  • Connecting a PHY to another PHY on a same board
    Generally, if I'm connecting a PHY to RJ45 connector, I would add center tap capacitors and Bob-Smith termination like below But if I am connecting a PHY to another PHY, do I still need the Bob-Smith termination? Or can I just have center tap capacitors on both sides like below? Both PHYs share same GND but are powered by different rails
  • microcontroller - Why are Ethernet MAC and PHY separate? - Electrical . . .
    The PHY also dissipates a significant amount of power all by itself And sometimes different media require different PHYs, but the MAC can be the same For all of these reasons, it makes sense to keep it as a separate chip That said, there are some chips targeted for embedded applications that include both Wiznet, for one, has products in
  • In USB, what is the difference between a PHY and a transceiver?
    A Phy is similar to a transceiver in that there is usually different signal standards on "both sides of the chip" With Ethernet it is MII GMII etc on one side and, well, Ethernet on the other
  • what is the difference between PHY and MAC chip
    what is the difference between PHY and MAC chip Ask Question Asked 12 years, 8 months ago Modified 12 years, 8 months ago
  • stm32 - How to implement OTG FS hardware using embedded PHY on . . .
    The OTG FS for STM32F105 107 (which does not support OTG HS 4) has an internal PHY 5 and a pull-up resistor; thus, I attempted to use section 3 3 of AN4879 Regarding the figure that is presented below: • The OTG specification requires the use of a capacitor (maximum value 4 7 μF) on VBUS
  • How to define PHY mode and MAC mode between back to back switches
    When connecting these devices in back to back mode with RGMII interface between then, I need to define which switch is PHY and which would be MAC right? In that case, can someone tell me how to do it? In the datasheet, mentioned in page 12, I don't see a strap option that can help to identify this switch as PHY or MAC
  • Why do Ethernet PHY magnetics have a center tap?
    I've a question with the Ethernet PHY connection to the RJ45 connector With either discrete or integrated magnetics, either with voltage mode PHY or current mode PHY, what is the purpose of the ce
  • The SERDES transceiver design inside the Ethernet MAC controller
    The 1st and 2nd figures are normal application which transmits the data through copper media with coded information (through PCS PMD PMA inside the PHY chip) The interface between the MAC and PHY is SGMII or XAUI for 1G and 10G base-T Ethernet However, the 3rd figure confuses me
  • Voltage mode Ethernet PHY and Current mode Ethernet PHY
    2 In the Ethernet PHY, we have two types Voltage mode PHY and current mode PHY Can anyone tell me the reason why the center taps of magnetics are shorted in case of connection to a current mode PHY whereas, the center taps of magnetics are individually decoupled in case of voltage-mode PHY? What is the principle behind this?





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